1123-A: Difference between revisions

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For intercomparisons where greater time resolution is possible (e.g., Loran C), a 1-MHz input is used to drive a delay circuit (0 to 9 microseconds in 1-microsecond steps, 0 to 1 microsecond continuously), which produces a 0.2-
For intercomparisons where greater time resolution is possible (e.g., Loran C), a 1-MHz input is used to drive a delay circuit (0 to 9 microseconds in 1-microsecond steps, 0 to 1 microsecond continuously), which produces a 0.2-
microsecond marker controlled by the last two front-panel thumbwheels.
microsecond marker controlled by the last two front-panel thumbwheels.
Readout is both visual and electrical. The clock's 1-pps master ticks are accumulated and displayed in a six-digit [[Numerik]] display, which can be preset to re-cycle at any number of hours from 1 to 99.
The indication of each digit may be changed without carrying to the next digit or interrupting the master tick.
Output BCD data from each digit and from each of the five decade dividers (0.1 second through 10 microseconds) are available in parallel.


==Specifications==
==Specifications==


==Links==
==Links==
 
* [https://www.ietlabs.com/pdf/GR_Experimenters/1965/GenRad_Experimenter_Feb-March_1965.pdf GR Experimenter Feb-Mar 1965]


==Photos==
==Photos==

Latest revision as of 00:03, 12 November 2024

General Radio 1123
Syncronometer
File:Gr 1123A front2.jpg
General Radio 1123-A Syncronometer

Available from to (?)

Manuals

please add

Catalog History
 Document Year Page
Catalog S 1965 116
Catalog T 1968 169
Catalog U 1970 192
(All manuals in PDF format unless noted otherwise)

The General Radio 1123-A Digital Syncronometer was introduced in Catalog S (1965) and remained available until Catalog U (1970).

It is basically a digital clock with circuits that enable it to be synchronised with standard time signals, originally intended to be used in conjunction with an 1124 time signal receiver system.

The 1123-A has three digitally delayed outputs, with delays selectable by thumbwheel switches.

To check the frequency of a signal (e.g. a 1 MHz standard), that frequency it is divided down and used as an external reference to the 1123-A.

The first sync output is used to trigger an oscilloscope, which displays the Loran C (or WWV signal). The delay of the second pulse is adjusted with the 1123A controls to be coincident with a peak or a zero crossing of the reference signal, e.g. Loran-C.

A pulse train derived from the 100-kHz input is divided down to produce a 1-pulse-per-second master tick and timing pulses at 100 kHz, 10 kHz, 1 kHz, 100 Hz, 10 Hz, 1 Hz, and 0.1 Hz. These signals also operate a five-digit recognition circuit to produce an 8-millisecond pedestal, occurring at 1 pps. This pedestal can be delayed by a precise amount of time with respect to the master tick, 0.00000 through 0.99999 s selected by thumbwheel switches.

Pedestal and a sync pulse are provided for comparisons of the master tick with WWV-type transmissions on an oscilloscope screen. For intercomparisons where greater time resolution is possible (e.g., Loran C), a 1-MHz input is used to drive a delay circuit (0 to 9 microseconds in 1-microsecond steps, 0 to 1 microsecond continuously), which produces a 0.2- microsecond marker controlled by the last two front-panel thumbwheels.

Readout is both visual and electrical. The clock's 1-pps master ticks are accumulated and displayed in a six-digit Numerik display, which can be preset to re-cycle at any number of hours from 1 to 99. The indication of each digit may be changed without carrying to the next digit or interrupting the master tick. Output BCD data from each digit and from each of the five decade dividers (0.1 second through 10 microseconds) are available in parallel.

Specifications

Links

Photos